A1.1.1 · Computer fundamentals
A1.1.1 · 计算机基础
Inside the CPU
CPU 内部
The processor is not one solid block. It is a small set of parts, two working units, five tiny stores called registers, and three shared wires called buses, that hand data and instructions back and forth in a fixed pattern.
处理器并不是一整块。它是一小组部件:两个工作单元、五个叫做寄存器的微小存储区,以及三条叫做总线的共用线路,它们按照固定的模式在彼此之间来回传递数据和指令。
A1's guiding question: what principles underpin the operation of a computer, from low-level hardware up to the operating system? This page starts at the lowest level: the parts inside the processor and how they pass work to each other.
A1 的引导性问题:从底层硬件到操作系统,是哪些原理支撑着一台计算机的运行?本页从最底层开始:处理器内部的部件,以及它们如何把工作交接给彼此。
Explainer
讲解
The two units: CU and ALU
两个单元:CU 与 ALU
The CPU (central processing unit) is the part of a computer that carries out the instructions of a program. Inside it are two working units.
CPU(中央处理器)是计算机中执行程序指令的部件。它内部有两个工作单元。
The control unit (CU) directs the processor. For every instruction it decodes the instruction (works out the operation from the opcode) and sends control signals out to the ALU, the registers and memory so that each one acts at the right moment. It works through the fetch step, then the decode step, then the execute step, for every instruction.
控制单元(CU)指挥处理器。对于每一条指令,它都会译码这条指令(根据操作码判断出要做什么操作),并向 ALU、寄存器和内存发出控制信号,使每一个部件都在正确的时刻动作。它对每一条指令依次完成取指、译码、执行这三步。
The arithmetic logic unit (ALU) is where the actual calculation happens. It carries out arithmetic operations (add, subtract, multiply, divide) and logic operations (AND, OR, NOT, XOR). It takes its input values from a register and leaves the result in the accumulator.
算术逻辑单元(ALU)是真正进行计算的地方。它执行算术运算(加、减、乘、除)和逻辑运算(与、或、非、异或)。它从寄存器取得输入值,并把结果留在累加器中。
Explainer
讲解
The five registers
五个寄存器
A register is a very small, very fast store inside the CPU that holds one item at a time while the processor works on it. The syllabus names five.
寄存器是 CPU 内部一个极小、极快的存储区,在处理器处理某个数据项时,它一次只保存一个。考纲列出了五个。
- IR
- Instruction register
- 指令寄存器
- PC
- Program counter
- 程序计数器
- MAR
- Memory address register
- 内存地址寄存器
- MDR
- Memory data register
- 内存数据寄存器
- AC
- Accumulator
- 累加器
| Register | What it holds | How it interacts with the others |
|---|---|---|
| IR | The instruction that has just been fetched from memory | The CU reads the IR to decode the current instruction, then the instruction is executed |
| PC | The address of whichever instruction will be fetched next | Its contents are placed in the MAR when a fetch begins; it is then increased so it points at the instruction after this one |
| MAR | The address of the memory location currently being read from or written to | Receives an address (from the PC, or from part of an instruction) and passes it to memory along the address bus |
| MDR | The data or instruction just read from memory, or about to be written to it | Whatever travels on the data bus between the CPU and memory passes through the MDR; a fetched instruction goes from here to the IR |
| AC | An operand, and the result of an ALU operation | The ALU takes a value from the AC, and puts its result back there, so the CPU does not have to reach memory for every step of a calculation |
| 寄存器 | 它保存什么 | 它如何与其他部件交互 |
|---|---|---|
| IR | 刚从内存取回来的那条指令 | CU 读取 IR 来译码当前指令,随后这条指令被执行 |
| PC | 下一条待取指令的地址 | 取指开始时,它的内容被复制到 MAR;随后它增加,使其指向再下一条指令 |
| MAR | 当前正在被读取或写入的内存单元的地址 | 接收一个地址(来自 PC,或来自指令的一部分),并沿地址总线把它传给内存 |
| MDR | 刚从内存读出的、或即将写入内存的数据或指令 | 在 CPU 与内存之间沿数据总线传输的一切都会经过 MDR;取回的指令从这里送到 IR |
| AC | 一个操作数,以及一次 ALU 运算的结果 | ALU 从 AC 取值,并把结果放回那里,这样 CPU 就不必为计算的每一步都去访问内存 |
The PC, MAR and MDR always work as a chain during a fetch: the PC says which address, the MAR carries that address to memory, and the MDR brings back what was there.
取指过程中,PC、MAR 和 MDR 始终像一条链条一样协作:PC 说出是哪个地址,MAR 把这个地址送到内存,MDR 再把那里的内容带回来。
Explainer
讲解
The three buses
三条总线
Each bus is a group of wires shared by several parts. It moves information from the CPU out to memory and other components, and back. The width of a bus (how many bits it can carry at once) matters for performance.
每一条总线都是被多个部件共用的一组线路。它把信息从 CPU 送往内存和其他部件,再送回来。总线的宽度(一次能传送多少位)会影响性能。
| Bus | What it carries | Direction |
|---|---|---|
| Address bus | A memory address, sent from the CPU to say which location it wants to read or write | One way: CPU to memory |
| Data bus | The data and instructions moving between the CPU and memory; a wider data bus (8, 16, 32 or 64 bits) moves more per transfer | Both ways |
| Control bus | Control and timing signals: read or write commands, interrupt requests, clock signals | Both ways |
| 总线 | 它传送什么 | 方向 |
|---|---|---|
| 地址总线 | 一个内存地址,由 CPU 发出,用来说明它要读或写哪个单元 | 单向:CPU 到内存 |
| 数据总线 | 在 CPU 与内存之间移动的数据和指令;数据总线越宽(8、16、32 或 64 位),每次传输的量越大 | 双向 |
| 控制总线 | 控制信号和定时信号:读或写命令、中断请求、时钟信号 | 双向 |
The address bus width sets how many locations the CPU can address at all: an n-bit address bus can reach 2n locations. The data bus width sets how much data moves in one transfer.
地址总线宽度决定了 CPU 总共能寻址多少个单元:一条 n 位的地址总线能访问 2n 个单元。数据总线宽度决定了一次传输能移动多少数据。
Explainer
讲解
Single-core, multi-core and co-processors
单核、多核与协处理器
A core is one complete set of the parts above: a CU, an ALU and registers, able to work through instructions on its own.
一个核心就是上面那一整套部件:一个 CU、一个 ALU 和寄存器,能够独立地逐条处理指令。
| Type | What it is | What it is good for |
|---|---|---|
| Single-core processor | One core, so it works through one instruction at a time in sequence | Simple, lower-cost devices and light workloads; it still runs several programs by switching between them, but shares the one core |
| Multi-core processor | Two or more cores on one chip (dual-core, quad-core, and so on), each able to process instructions at the same time as the others | Real multitasking and workloads split into parts that run in parallel, but only if the software is written to use the extra cores |
| Co-processor | A separate, specialised processor that handles one kind of job for the main CPU | Offloading a heavy specific task, such as graphics (a GPU) or signal processing (a DSP), so the main CPU is free for general work |
| 类型 | 它是什么 | 它擅长什么 |
|---|---|---|
| 单核处理器 | 只有一个核心,因此一次按顺序处理一条指令 | 简单、成本较低的设备和较轻的负载;它仍能通过在多个程序之间切换来运行多个程序,但共用这一个核心 |
| 多核处理器 | 一块芯片上有两个或更多核心(双核、四核等),每个核心都能与其他核心同时处理指令 | 真正的多任务处理,以及可拆分成多个部分并行运行的负载,但前提是软件被编写成能利用这些额外的核心 |
| 协处理器 | 一个独立的、专门化的处理器,为主 CPU 处理某一类工作 | 把某项繁重的特定任务分担出去,例如图形处理(GPU)或信号处理(DSP),从而让主 CPU 腾出手来处理一般性工作 |
Diagram
图示
Explore the CPU and its connections
探索 CPU 及其连接
The syllabus asks for a diagram of how these components relate. Click any part, or any bus, to see its job and what it connects to.
考纲要求画出这些部件之间关系的图示。点击任意部件或任意总线,查看它的作用以及它连接到什么。
Check your understanding
检验你的理解
When an instruction is fetched, the address held in the program counter (PC) is handed to the MAR. Which bus then carries that address to memory?
取指令时,程序计数器(PC)中所存的地址被交给 MAR。随后是哪一条总线把这个地址送到内存?
Common mistake
常见错误
RecurringA common weak answer treats cores as a simple multiplier: "a quad-core CPU runs everything four times quicker than a single-core one." It does not. The extra speed only appears when the software has been written to split its work across several cores at once. A program written to run as a single sequence of steps uses one core and gains little or nothing from the others. Memory speed and the CPU's design also limit how much difference more cores make.
反复出现一个常见的薄弱答案把核心当作简单的倍数关系:"四核 CPU 比单核快四倍。"并非如此。只有当软件被编写成能把工作同时拆分到多个核心上时,额外的速度才会体现出来。一个被写成单一步骤序列来运行的程序只用一个核心,从其他核心几乎得不到什么好处。内存速度和 CPU 的设计也限制了增加核心能带来多大差别。
Treats cores as a multiplier: "Adding a second core doubles the processing speed." Ignores that the work has to be divisible and the software has to be built to divide it.
把核心当作倍数: "加上第二个核心,处理速度就翻倍。" 忽略了工作必须是可拆分的,而且软件必须被构建成能去拆分它。
States the condition: "A second core lets two instruction sequences run at the same time, so a task that can be split into independent parts runs faster; a task that cannot be split, or software not written for multiple cores, sees little improvement."
说明了前提条件: "第二个核心让两条指令序列能同时运行,所以一个可以拆成互相独立的部分的任务会更快;而一个无法拆分的任务,或没有为多核编写的软件,则几乎看不到提升。"
Revision questions
复习题
Specimen-paper style. Write an answer, then reveal the marking points and mark yourself.
采用样卷风格。写下答案,然后展开评分要点给自己打分。
[2]Outline the function of the accumulator (AC).
[2]概述累加器(AC)的功能。
Marking points
评分要点
- The accumulator holds an operand for the ALU and receives the result of an ALU operation.
- This keeps the working value inside the CPU, so it does not have to be read from or written to memory at every step of a calculation.
- 累加器为 ALU 保存一个操作数,并接收一次 ALU 运算的结果。
- 这让工作中的值留在 CPU 内部,不必在计算的每一步都从内存读取或写入。
[2]Identify the bus that carries an address from the CPU to memory, and state one other job done by a different bus.
[2]指出把地址从 CPU 送到内存的那条总线,并说出另一条总线所做的一项其他工作。
Marking points
评分要点
- The address bus carries the address from the CPU to memory.
- One other job by a different bus (any one): the data bus carries data and instructions between the CPU and memory; the control bus carries read or write commands, interrupt requests and clock signals.
- 地址总线把地址从 CPU 传到内存。
- 另一条总线的另一项工作(任选其一):数据总线在 CPU 与内存之间传送数据和指令;控制总线传送读或写命令、中断请求和时钟信号。
[4]Describe how the program counter (PC), the MAR and the MDR work together when one instruction is fetched from memory.
[4]描述从内存取一条指令时,程序计数器(PC)、MAR 和 MDR 如何协同工作。
Marking points
评分要点
- The address in the PC is copied into the MAR.
- The MAR sends that address to memory along the address bus (with a read signal on the control bus).
- The instruction at that address is returned along the data bus into the MDR.
- The instruction is copied from the MDR into the instruction register, and the PC is incremented to point at the next instruction.
- PC 中的地址被复制到 MAR。
- MAR 沿地址总线把该地址送到内存(控制总线上带一个读信号)。
- 该地址处的指令沿数据总线返回到 MDR。
- 指令从 MDR 复制到指令寄存器,PC 加 1,指向下一条指令。
[3]Explain why moving a program from a single-core to a quad-core processor may not make it run four times as fast.
[3]解释为什么把一个程序从单核处理器移到四核处理器上,不一定会让它运行速度快四倍。
Marking points
评分要点
- Extra speed only appears when the work can be split into independent parts, and the software has been written to run those parts on separate cores.
- A task that is mostly a single sequence of dependent steps cannot be split, so it still runs on one core.
- Some time is also lost coordinating the cores and sharing data between them.
- 只有当工作能被拆成相互独立的部分、且软件被写成能把这些部分放到不同核心上运行时,才会有额外的速度提升。
- 一个主要由一串相互依赖的步骤组成的任务无法拆分,所以它仍然在一个核心上运行。
- 协调各核心、在它们之间共享数据也会损失一些时间。
[3]Describe how the control unit (CU) differs from the arithmetic logic unit (ALU), and state how they work together during one instruction.
[3]描述控制单元(CU)与算术逻辑单元(ALU)有何不同,并说明它们在一条指令执行过程中如何协同工作。
Marking points
评分要点
- The control unit decodes each instruction and sends control signals to coordinate the other parts; the ALU carries out the actual arithmetic and logic operations.
- During one instruction the CU decodes it and signals the ALU, then the ALU performs the operation (for a calculation) using the accumulator.
- 控制单元对每条指令译码,并发出控制信号协调其他部件;ALU 执行实际的算术和逻辑运算。
- 在一条指令的过程中,CU 对它译码并给 ALU 发信号,然后 ALU(在需要运算时)借助累加器执行该操作。
Flashcards
记忆卡片
Active recall for this statement’s key terms.
针对本条考纲陈述关键术语的主动回忆练习。
Keep this statement’s practice with you
把这条考纲陈述的练习保存下来
Free account: unlock every revision question and flashcard for A1.1.1, and every other IB CS 2027 statement.
免费账户:解锁 A1.1.1 以及所有其他 IB CS 2027 考纲陈述的全部复习题和记忆卡片。